Re: gEDA-dev: verilog-AMS

[al davis <ad136-at-NOSPAMfreeelectron_dot_net>]

On Monday 07 May 2007, John Doty wrote:
> BSDL Files

BSDL is a subset of VHDL.

> IBIS Models

IBIS models are just a bunch of tables.  A set of macros in 
Verilog-AMS will enable reading of IBIS models.  Due to 
inconsistencies in the format, IBIS is a very difficult format 
to implement fully, even though the functionality is limited.  
IBIS support in gnucap is 90% complete, and on hold.

> SABER Models

SABER is a proprietary format.  To implement it would incur the 
wrath of Synopsys, a risk not worth taking.  Its use is 
declining, because better functionality is available without 
proprietary lock-in issues with Verilog-AMS and VHDL-AMS.  Even 
its creators are recommending the switch to VHDL-AMS or 
Verilog-AMS.  The SABER people are major contributers to both 
*AMS languages, leaning a little more to VHDL.  Syntax 
translation is easy, and since SABER functionality is a subset 
of either *AMS, supporting Verilog-AMS implies eventually the 
ability to read SABER models.  It could also be handled by 
swapping the parser from Verilog-AMS.  All of the differences 
can be expressed in the BNF.  The hard part is the same.

> Simulink Models

Proprietary again.  SInce it is built around MATLAB, the 
translation is not quite as direct as SABER, but most of 
the same arguments apply.

> SPICE Models

The baggage associated with a SPICE syntax is huge and causes 
significant problems to developers.  There are so many variants 
in common use that supporting them all is impossible without a 
development budget in the millions.  The reason I say "almost" 
a proper subset has to do with the syntax of current controlled 
devices, which does not have a proper translation to 
Verilog-AMS.  Even the creator of SPICE now admits the mistake.

Yet the functionality of the SPICE format is only a tiny subset 
of what Verilog-AMS will do.



On Monday 07 May 2007, John Doty wrote:
> Where are the Verilog-AMS models? Given no models, I *cannot*
> switch   from SPICE.

I understand now.  You think we should wait until everyone else 
has it, then copy.

The formats you mention are all old ones.  They have been around 
a long time.  That's why you find so many models.  In 1985, did 
you oppose SABER with the same vigor that you oppose 
Verilog-AMS?  In 1980, did you oppose SPICE ......

The reason you don't see many Verilog-AMS models is that it is 
too new.

I said before that the biggest pressure now on gnucap is for 
plugins and Verilog-AMS, and not from gEDA.  Would you like to 
know from who???  Well .... It's the people who made those 
IBIS, SABER, Simulink, and SPICE models, who are tired of the 
nonsense of the screwed-up and proprietary formats.


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