Re: gEDA: Re: Verilog integer bits

[Jeff McNeal <jmcneal-at-NOSPAMlevel1_dot_com>]

David Cary wrote:

> <...>
> It does seem kinda silly that description of a piece of hardware might be
> compiled into a functionally different piece of hardware depending on which
> Verilog compiler (32 bit or 64 bit) one used.
>

Just to clear up a small point:  the hardware will be the same, it's the
simulation
that will vary.  Verilog should synthesize down to the same set of gates,
(especialy
since almost everyone uses the same tool for that, synopsys) but simulation
results may vary.  Not to say that this isn't a problem. It can be very
confusing when
a sim works but the part doesn't.

Jeff