geda-dev Mailing List Archive (by thread)

• Thread Index

• Re: gEDA: I compiled 19990829 and it works fine :))
  • From: Ales Hvezda
• Re: gEDA: Build of gPCB
  • From: Ales Hvezda
• gEDA: 19990829 development snapshots released
  • From: Ales Hvezda
• Re: gEDA: Build of gPCB
  • From: Matt Ettus
• gEDA: HPGL viewer
  • From: Terry Porter
• Re: gerber Re: gEDA: gschem and gpcb
  • From: Uwe Bonnes
• Re: gerber Re: gEDA: gschem and gpcb
  • From: Reinhard Kotucha
• gEDA: Parallel ACS?
  • From: Matt Ettus
• gEDA: Symbols
  • From: Jamil Khatib
• Re: gEDA: Symbols
  • From: Ales Hvezda
• Re: gEDA: 19990829 development snapshots released : intel RPMS
  • From: Manu Rouat
• gEDA: Icarus Verilog RFC
  • From: Stephen Williams
• RE: gEDA: Icarus Verilog RFC
  • From: stevenwilson
• Re: gEDA: Icarus Verilog RFC
  • From: Stefan Thiede
• Re: gEDA: Icarus Verilog RFC
  • From: Stephen Williams
• Re: gEDA: Icarus Verilog RFC
  • From: Peter Monta
• Re: gEDA: Icarus Verilog RFC
  • From: Stephen Williams
• Re: gEDA: Icarus Verilog RFC
  • From: Stephen Williams
• RE: gEDA: Icarus Verilog RFC
  • From: stevenwilson
• Re: gEDA: Icarus Verilog RFC
  • From: Peter Monta
• Re: gEDA: Icarus Verilog RFC
  • From: Stephen Williams
• RE: gEDA: Icarus Verilog RFC
  • From: stevenwilson
• Re: gEDA: Icarus Verilog RFC
  • From: Stephen Williams
• Re: gEDA: Icarus Verilog RFC
  • From: Stephen Williams
• gEDA: Icarus Verilog todo list
  • From: Stephen Williams
• gEDA: quiet list?
  • From: Stephen Williams
• Re: gEDA: quiet list?
  • From: Ales Hvezda
• gEDA: Netlister broken
  • From: Mike Jarabek
• Re: gEDA: Icarus Verilog todo list
  • From: Jeff McNeal
• Re: gEDA: Netlister broken
  • From: Ales Hvezda
• Re: gEDA: Icarus Verilog todo list
  • From: Stephen Williams
• Re: gEDA: Icarus Verilog todo list
  • From: Andrew Bardsley
• RE: gEDA: Netlister broken
  • From: Mike Jarabek
• Re: gEDA: Icarus Verilog todo list
  • From: Arnim Littek
• Re: gEDA: Netlister broken
  • From: Ales Hvezda
• Re: gEDA: Netlister broken
  • From: Ales Hvezda
• gEDA: Icarus Verilog 19990903 snapshot
  • From: Stephen Williams
• Re: gEDA: Netlister broken
  • From: Mike Jarabek
• gEDA: Icarus Verilog 0.1 Feature Freeze
  • From: Stephen Williams
• gEDA: Re: IVL lexical problem/patch
  • From: Stephen Williams
• Re: gEDA: Icarus Verilog 0.1 Feature Freeze
  • From: Guy Hutchison
• Re: gEDA: Icarus Verilog 0.1 Feature Freeze
  • From: Stephen Williams
• gEDA: Moving delay...
  • From: Eric Busta
• Re: gEDA: Moving delay...
  • From: Terry Porter
• gEDA: Icarus Verilog web page
  • From: Stephen Williams
• gEDA: Icarus Verilog web page, redux
  • From: Stephen Williams
• gEDA: Verilog: empty statements, more tests
  • From: Peter Monta
• Re: gEDA: Verilog: empty statements, more tests
  • From: Steve Wilson
• gEDA: One ore tester!
  • From: Thomas Heidel
• Re: gEDA: One ore tester!
  • From: Darin Ingimarson
• Re: gEDA: Verilog: empty statements, more tests
  • From: Guy Hutchison
• Re: gEDA: Verilog: empty statements, more tests
  • From: Stephen Williams
• Re: gEDA: Verilog: empty statements, more tests
  • From: Steve Wilson
• gEDA: Dumb (g)netlist question.
  • From: Ales Hvezda
• Re: gEDA: Dumb (g)netlist question.
  • From: Richard G. Munden
• Re: gEDA: Dumb (g)netlist question.
  • From: Andrew M. Dyer
• Re: gEDA: Dumb (g)netlist question.
  • From: Matt Mozur
• Re: gEDA: One more tester!
  • From: Thomas Heidel
• Re: gEDA: One more tester!
  • From: Darin Ingimarson
• gEDA: Verilog: task arguments
  • From: Peter Monta
• gEDA: Uploaded geda-gschem 19990829-1 (source i386) to geda
  • From: Hamish Moffatt
• gEDA: Uploaded geda-utils 19990829-1 (source i386) to geda
  • From: Hamish Moffatt
• gEDA: Uploaded geda-symbols 19990829-1 (source all) to geda
  • From: Hamish Moffatt
• gEDA: Uploaded libgeda 19990829-1 (source i386) to geda
  • From: Hamish Moffatt
• gEDA: Uploaded geda 19990809 (source all) to geda
  • From: Hamish Moffatt
• gEDA: Uploaded geda-gnetlist 19990829-1 (source i386) to geda
  • From: Hamish Moffatt
• Re: gEDA: Dumb (g)netlist question.
  • From: Hamish Moffatt
• Re: gEDA: Dumb (g)netlist question.
  • From: Laurin Blacken
• gEDA: Verilog: misc. elaboration
  • From: Peter Monta
• gEDA: debs uploaded
  • From: Hamish Moffatt
• RE: gEDA: Verilog: misc. elaboration
  • From: stevenwilson
• Re: gEDA: debs uploaded
  • From: Manu Rouat
• Re: gEDA: Verilog: misc. elaboration
  • From: Stephen Williams
• RE: gEDA: Verilog: misc. elaboration
  • From: stevenwilson
• Re: gEDA: Verilog: misc. elaboration
  • From: Stephen Williams
• Re: gEDA: Dumb (g)netlist question.
  • From: Stefan Petersen
• Re: gEDA: Dumb (g)netlist question.
  • From: Ales Hvezda
• gEDA: Icarus Verilog web page
  • From: Stephen Williams
• Re: gEDA: Verilog: task arguments
  • From: Stephen Williams
• gEDA: Verilog: ternary patch
  • From: Peter Monta
• gEDA: Verilog: ternary test code
  • From: Peter Monta
• Re: gEDA: Verilog: ternary test code
  • From: Steve Wilson
• Re: gEDA: Verilog: ternary patch
  • From: Stephen Williams
• Re: gEDA: Verilog: ternary patch
  • From: Peter Monta
• Re: gEDA: Verilog: ternary test code
  • From: Peter Monta
• Re: gEDA: debs uploaded
  • From: Hamish Moffatt
• gEDA: Verilog: parse error
  • From: Peter Monta
• gEDA: Test supervisor RFC
  • From: stevenwilson
• Re: gEDA: Test supervisor RFC
  • From: Stephen Williams
• Re: gEDA: Verilog: parse error
  • From: Stephen Williams
• Re: gEDA: Verilog: ternary test code
  • From: Stephen Williams
• Re: gEDA: Verilog: parse error
  • From: Peter Monta
• Re: gEDA: Verilog: ternary test code
  • From: Steve Wilson
• Re: gEDA: Verilog: parse error
  • From: Stephen Williams
• Re: gEDA: Icarus Verilog web page
  • From: Ales Hvezda
• Re: gEDA: Icarus Verilog web page
  • From: Stephen Williams
• gEDA: Icarus Verilog 19990911 snapshot
  • From: Stephen Williams
• gEDA: GPLed PCB design Software
  • From: linuxkernel
• gEDA: Verilog: integer declarations, string bug?
  • From: Peter Monta
• Re: gEDA: Icarus Verilog 19990911 snapshot
  • From: Stefan Petersen
• Re: gEDA: Icarus Verilog 19990911 snapshot
  • From: Stephen Williams
• gEDA: Power/gnd nets
  • From: Ales Hvezda
• gEDA: Hardware accelerated simulation
  • From: Stephen Williams
• Re: gEDA: Hardware accelerated simulation
  • From: Peter Monta
• Re: gEDA: Hardware accelerated simulation
  • From: Roger Dingledine
• gEDA: Free prototype board
  • From: jamil Isma'il khatib
• Re: gEDA: Hardware accelerated simulation
  • From: Dale E. Martin
• Re: gEDA: Hardware accelerated simulation
  • From: Stephen Williams
• Re: gEDA: Free prototype board
  • From: Stephen Williams
• Re: gEDA: Free prototype board
  • From: Matt Ettus
• Re: gEDA: Free prototype board
  • From: Stephen Williams
• RE: gEDA: Free prototype board
  • From: stevenwilson
• Re: gEDA: Free prototype board
  • From: Ales Hvezda
• Re: gEDA: Free prototype board
  • From: Ales Hvezda
• Re: gEDA: Free prototype board
  • From: Stephen Williams
• RE: gEDA: Free prototype board
  • From: Mike Jarabek
• Re: gEDA: Free prototype board
  • From: Stephen Williams
• Re: gEDA: Free prototype board
  • From: Graham Seaman
• RE: gEDA: Free prototype board
  • From: Mike Jarabek
• gEDA: CVS compilation report
  • From: Matt Ettus
• Re: gEDA: CVS compilation report
  • From: Ales Hvezda
• Re: gEDA: CVS compilation report
  • From: Matt Ettus
• Re: gEDA: CVS compilation report
  • From: Ales Hvezda
• gEDA: netlisting features
  • From: Matt Ettus
• Re: gEDA: Power/gnd nets
  • From: Stefan Petersen
• Re: gEDA: Free prototype board
  • From: Stefan Petersen
• gEDA: Bug in me or ivl??
  • From: Stefan Petersen
• gEDA: Updated verilog compile script and man page 19990913
  • From: Stefan Petersen
• gEDA: my bad...
  • From: Matt Ettus
• Re: gEDA: Bug in me or ivl??
  • From: Stephen Williams
• Re: gEDA: my bad...
  • From: Ales Hvezda
• Re: gEDA: my bad...
  • From: Ales Hvezda
• Re: gEDA: Updated verilog compile script and man page 19990913
  • From: Stephen Williams
• gEDA: Allegro Netlister
  • From: Matt Ettus
• Re: gEDA: Allegro Netlister
  • From: Matt Ettus
• gEDA: geda v orcad :-)
  • From: Graham Seaman
• Re: gEDA: geda v orcad :-)
  • From: Matt Ettus
• RE: gEDA: geda v orcad :-)
  • From: stevenwilson
• Re: gEDA: geda v orcad :-)
  • From: Graham Seaman
• Re: gEDA: geda v orcad :-)
  • From: Jeff McNeal
• Re: gEDA: geda v orcad :-)
  • From: Graham Seaman
• RE: gEDA: geda v orcad :-)
  • From: Matt Ettus
• Re: gEDA: geda v orcad :-)
  • From: Matt Ettus
• gEDA: Library Preview
  • From: salman sheikh
• Re: gEDA: geda v orcad :-) (fwd)
  • From: Stephen Williams
• Re: gEDA: geda v orcad :-)
  • From: Stephen Williams
• Re: gEDA: Updated verilog compile script and man page 19990913
  • From: Stefan Petersen
• Re: gEDA: Bug in me or ivl??
  • From: Stefan Petersen
• gEDA: PCB netlist generation???
  • From: Stefan Petersen
• gEDA: scheme gurus out there?
  • From: Matt Ettus
• Re: gEDA: PCB netlist generation???
  • From: Matt Ettus
• Re: gEDA: Bug in me or ivl??
  • From: Stephen Williams
• gEDA: scheme gurus out there?
  • From: thi
• Re: gEDA: Updated verilog compile script and man page 19990913
  • From: Stephen Williams
• gEDA: Sparc's core opensourced ?
  • From: linuxkernel
• gEDA: longstanding bug
  • From: Matt Ettus
• Re: gEDA: Sparc's core opensourced ? NOT!
  • From: Steve Wilson
• Re: gEDA: Sparc's core opensourced ? NOT!
  • From: Stephen Williams
• Re: gEDA: Sparc's core opensourced ? NOT!
  • From: Matt Ettus
• gEDA: Ask and ye shall receive
  • From: Matt Ettus
• Re: gEDA: Sparc's core opensourced ? NOT!
  • From: Matthew van de Werken
• Re: gEDA: Ask and ye shall receive
  • From: Ales Hvezda
• Re: gEDA: geda v orcad :-)
  • From: Mike Jarabek
• Re: gEDA: longstanding bug
  • From: Ales Hvezda
• Re: gEDA: Ask and ye shall receive
  • From: Matt Ettus