gEDA: Verilog: empty statements, more tests

[Peter Monta <pmonta-at-NOSPAMhalibut_dot_imedia_dot_com>]

This small patch fixes empty statements in case items and
conditionals.  A statement_opt is also used in wait statments
and tasks, so it might be good to check those for the same bug.

Attached are some more trivial test files (also one for extended
identifiers).  VCS passes them all.

Is it legal to implicity declare a wire using a named port
within a module instantiation?  This construct occurs in
some code, but I haven't chased the grammar; VCS accepts it
though, hm.

Cheers,
Peter Monta   pmonta@imedia.com
Imedia Corp.

diff -ur verilog-19990903-orig/elaborate.cc verilog-19990903/elaborate.cc
--- verilog-19990903-orig/elaborate.cc	Thu Sep  2 21:28:38 1999
+++ verilog-19990903/elaborate.cc	Mon Sep  6 23:13:46 1999
@@ -1645,7 +1645,7 @@
 
 	// Well, I actually need to generate code to handle the
 	// conditional, so elaborate.
-      NetProc*i = if_->elaborate(des, path);
+      NetProc*i = if_? if_->elaborate(des, path) : 0;
       NetProc*e = else_? else_->elaborate(des, path) : 0;
 
       NetCondit*res = new NetCondit(expr, i, e);
diff -ur verilog-19990903-orig/pform_dump.cc verilog-19990903/pform_dump.cc
--- verilog-19990903-orig/pform_dump.cc	Wed Aug 25 15:22:41 1999
+++ verilog-19990903/pform_dump.cc	Mon Sep  6 23:23:43 1999
@@ -386,7 +386,10 @@
 void PCondit::dump(ostream&out, unsigned ind) const
 {
       out << setw(ind) << "" << "if (" << *expr_ << ")" << endl;
-      if_->dump(out, ind+3);
+      if (if_)
+	    if_->dump(out, ind+3);
+      else
+	    out << setw(ind) << ";" << endl;
       if (else_) {
 	    out << setw(ind) << "" << "else" << endl;
 	    else_->dump(out, ind+3);
diff -ur verilog-19990903-orig/t-vvm.cc verilog-19990903/t-vvm.cc
--- verilog-19990903-orig/t-vvm.cc	Fri Sep  3 18:57:15 1999
+++ verilog-19990903/t-vvm.cc	Mon Sep  6 23:10:49 1999
@@ -1102,7 +1102,8 @@
 
 	    sc << "      bool step_" << thread_step_ << "_()" << endl;
 	    sc << "      {" << endl;
-	    net->stat(idx)->emit_proc(sc, this);
+	    if (net->stat(idx))
+		  net->stat(idx)->emit_proc(sc, this);
 	    sc << "        step_ = &step_" << exit_step << "_;" << endl;
 	    sc << "        return true;" << endl;
 	    sc << "      }" << endl;
@@ -1116,7 +1117,8 @@
 
 	    sc << "      bool step_" << thread_step_ << "_()" << endl;
 	    sc << "      {" << endl;
-	    net->stat(default_idx)->emit_proc(sc, this);
+	    if (net->stat(default_idx))
+		  net->stat(default_idx)->emit_proc(sc, this);
 	    sc << "        step_ = &step_" << exit_step << "_;" << endl;
 	    sc << "        return true;" << endl;
 	    sc << "      }" << endl;

~/ptest2.tar.gz