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gEDA: Open Source PCB Tools Survey - take 2
- To: OpenPPC Project Mailing List <ppc-mobo-at-NOSPAMraj_dot_phys_dot_sfu_dot_ca>
- Subject: gEDA: Open Source PCB Tools Survey - take 2
- From: Braddock Gaskill <braddock-at-NOSPAMgaffney-kroese_dot_com>
- Date: Sat, 25 Sep 1999 00:15:14 -0400 (EDT)
- cc: Thomas_dot_Nau-at-NOSPAMrz_dot_uni-ulm_dot_de, Harry Eaton <haceaton-at-NOSPAMaplcomm_dot_jhuapl_dot_edu>, pcb-at-NOSPAMmajordomo_dot_uni-ulm_dot_de, geda-dev-at-NOSPAMgeda_dot_seul_dot_org, aldavis-at-NOSPAMieee_dot_org, emmanuel_dot_ruat-at-NOSPAMwanadoo_dot_fr, khatib-at-NOSPAMieee_dot_org, matt-at-NOSPAMettus_dot_com, steve-at-NOSPAMicarus_dot_com, lazzaro-at-NOSPAMcs_dot_berkeley_dot_edu, tim-at-NOSPAMbach_dot_ece_dot_jhu_dot_edu, stubin-at-NOSPAMelectriceditor_dot_com, damc-at-NOSPAMnatmlab_dot_dms_dot_oz_dot_au, roger-at-NOSPAMmips_dot_com
- In-Reply-To: <199909250010.RAA08713@plushie.suespammers.org>
- Reply-To: geda-dev-at-NOSPAMseul_dot_org
- Sender: owner-geda-dev-at-NOSPAMseul_dot_org
Thanks for everyone who responded to my original tool list yesterday.
I've done a LOT more digging, and have put this together. I'm sending
this to the authors of the tools as well so they can make
comments/corrections/updates. Tom [Geller] could you please put the html
version on the web site? Thanks, Braddock
___________________________________
Open Source PCB Design Tools
Braddock Gaskill (braddock@braddock.com)
24 September 1999
___________________________________
This list was compiled by Braddock Gaskill ([2]braddock@braddock.com)
on 24 September 1999. It is a list, with links and descriptions, of
available Open Source electronic printed circuit board design
software.
This was compiled for the Open PowerPC Project. The Open PowerPC
project (http://www.openppc.org) is an effort to make an "Open
Source" PPC CPU-based motherboard design. But first we need Open
Source tools to do it with! Please contribute or correct me any way
you can (Braddock Gaskill - braddock@braddock.com). Thanks.
Table of Contents
* PCB
* gEDA - GPL Electronic Design Automation
* Caltech "Chipmunk" tool collection
* MUCS PCB - University of Manchester PCB Software
* XCircuit
* Electric VLSI Design System
* hpgl2ps
* Edif Parser
* PCBCA
* Related Links
_________________________________________________________________
PCB
Graphical PCB Layout Application
Description: "PCB" program seems stable and flexable. Needs support
for more layers and groups. Outputs Gerber, NC drill file, and
Postscript. Saves/Loads in a well documented format. Large existing
parts library. Well documented.
Part Library: Yes
Primary authors: Thomas Nau (Thomas.Nau@rz.uni-ulm.de), Harry
Eaton (haceaton@aplcomm.jhuapl.edu)
Web Page: http://bach.ece.jhu.edu/~haceaton/pcb/
Mailing list: pcb@majordomo.uni-ulm.de
_________________________________________________________________
gEDA - GPL Electronic Design Automation
Web Page: http://www.geda.seul.org
Mailing List: geda-dev@geda.seul.org
Description: This is a very ambitious project to create a
sophisticated integrated electronic CAD application suite. [Most of
the tools, however, are in very early stages of development and may or
may not be ready for production use.] The suite uses the GTK GUI
toolkit (like GIMP and GNOME).
* ACS - Al's Circuit Simulator (Author: Al Davis -
aldavis@ieee.org)
ACS is a general purpose circuit simulator. It performs nonlinear
dc and transient analyses, fourier analysis, and ac analysis
linearized at an operating point. It is fully interactive and
command driven. It can also be run in batch mode or as a server.
The output is produced as it simulates. Spice compatible models
for the MOSFET (level 1,2,3,6) and diode are included in this
release.
* gmos - Metal/Oxyde Semiconductor simulator (Author: Emmanuel Rouat
- emmanuel.ruat@wanadoo.fr)
* gnetlist - Netlist Generation (Author: Ales V. Hvezda -
ahvezda@gega.seul.org)
gnetlist is a netlist generation program. It takes .sch
(schematic) and .sym (symbol) files and converts them into
netlists. Well, at least that's the plan-- gnetlist is still
highly alpha and isn't usable yet, but it is being worked on.
* gpcb - Printed Circuit Board (Author: Eric Busta -
ewbusta@geda.seul.org) - Possibly vaporware?
* gschcheck - Schematic Checker (Author: Jamil Khatib
khatib@ieee.org)
gschcheck is a schematic sheet checker. Give it a schematic file
and it will go through and perform some basic ERC (Electronic Rule
Checking) such as floating nets, floating pins, and multiple net
names. "It is a fairly new piece of code but it works."
* gschem - Schematic Capture (Author: Ales V. Hvezda -
ahvezda@geda.seul.org)
gschem is the schematic capture program/tool which is part of
gEDA. It's sole purpose is to facilitate the graphical input of
components/circuits. [Looks like it will be a nice tool, but not
very feature rich yet.]
* sarlacc - An OrCAD schematic converter (Author: Matthew Ettus -
matt@ettus.com)
Project Sarlacc is an OrCAD to gEDA format schematic converter.
This project is beta software, so it still has limitations. [This
may prove VERY useful in converting the IBM PPC POP or Motorola
reference designs]
* Icarus Verilog - Verilog Compiler (Author: Stephen Williams -
steve@icarus.com)
Icarus Verilog is a a GPLed Verilog compiler. Icarus Verilog
includes a a parser that parses Verilog (plus extensions) and
generates an internal netlist. The netlist is passed to various
processing steps that transform the design to more
optimal/practical forms, then passed to a code generator for final
output.
Official website of Icarus Verilog is:
http://www.icarus.com/eda/verilog/
_________________________________________________________________
Caltech "Chipmunk" tool collection
These tools date back to the early 80's.
Web Site: http://www.pcmp.caltech.edu/chipmunk/
Contact: John Lazzaro (lazzaro@cs.berkeley.edu)
Description:
"Log" - Log is a circuit schematic capture tool and simulation
environment. Log supports schematic entry for documentation,
simulation, and netlist creation. Schematic printouts can be previewed
on-screen, and Postscript and HPGL output. Can generate SPICE and
"NTK" format netlists. Has extensive (?) analog and digital simulation
capabilities.
"Wol" - IC mask layout environment.IS THIS ADAPTABLE TO PCB LAYOUT?
Numerous other supporting tools.
_________________________________________________________________
MUCS PCB - University of Manchester PCB Software
A suite of PCB layout tools, from schematic capture, to auto-routing,
to layout.
Authors: Doug Edwards, Alistair MacIntosh, Zahir Moosa, Fred Hoyle
Web Page: http://www.cs.man.ac.uk/amulet/pcb/index.html
Description: The main feature of this tool-set is it's stand-alone
auto-router, which seems quite advanced and implements several
algorithms. Documentation seems very good. File formats are well
documented. This router is just asking to be integrated into PCB or
gEDA...
Other MUCS tools include: Ncap, a textual schematic capture interface;
Place, a graphical device placement tool; and various other utilities
for manipulating and editing the design and generating GERBER or HPGL
output.
Part Library: Yes
_________________________________________________________________
XCircuit
Schematic Capture drawing tool.
Description: Very appropriate for parts-library based drawing, but of
unknown maturity (?). Can save "netlist" format files for layout or
simulation tools.
Part Library: Yes
Author: R. Timothy Edwards - tim@bach.ece.jhu.edu
Web Page: http://bach.ece.jhu.edu/~tim/programs/xcircuit
_________________________________________________________________
Electric VLSI Design System
Web Page: http://www.electriceditor.com
Description: This is a very extensive CAD system. It used to be
commercial until "Electric Editor, Inc" released it under GPL for
pubicity to sell their commercial modules for it. Electric can handle
many forms of circuit design, including:
* Custom IC layout
* Schematic Capture (digital and analog)
* Textual Languages such as VHDL and Verilog
* Electro-mechanical hybrid layout
* Programmable logic (FPGAs)
The free version of Electric supports a number of file formats, but
EDIF and SDF require a commercial module from Electric Editor, Inc
(though you're free to write a GPL'd one!) Electric includes a fairly
extensive manual.
Contact: Steven Rubin (stubin@electriceditor.com)
_________________________________________________________________
hpgl2ps
Description: This is a very small C program to convert HPGL or DXY
files to PostScript. This is from comp.sources.misc, Volume 1, 1987.
[I have not been able to get this to actually work, even on the
supplied test case.].
Download:
ftp://ftp.uu.net/usenet/comp.sources.misc/volume1/8712/hpgl2ps.Z
Author: Don McCormick (damc@natmlab.dms.oz.au ???)
_________________________________________________________________
Edif Parser
Description: This is a BISON parser for EDIF 2.0.0 level 0, which is a
standard CAD format (see http://www.edif.org , though they want a
couple hundred to buy the spec [Anyone know where else we can get the
spec??]). This would require a lot of work to make useable.
Download:
ftp://ftp.uu.net/usenet/comp.sources.misc/volume1/8712/edif
Author: Roger March (roger@mips.com ???)
_________________________________________________________________
PCBCA
Description: An old ('89) DOS PCB autorouting package. It may be
useful, however, because it comes with C source (6000+ lines), and an
article describing the algorithms used, and routing algorithms in
general, with references. Licensing is GPLish.
Download:
ftp://oak.oakland.edu/pub/simtelnet/msdos/cad/pcbca110.zip
Author: Randy Nevin
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 //EN">
<HTML>
<HEAD>
<TITLE>Open Source PCB Design Tools</TITLE>
</HEAD>
<BODY>
<CENTER>
<HR WIDTH=50%>
<H1>Open Source PCB Design Tools</H1>
<EM>Braddock Gaskill (<A HREF="mailto:braddock@braddock.com">braddock@braddock.com</A>)<BR>
24 September 1999</EM>
<HR WIDTH=50%>
</CENTER>
This list was compiled by Braddock Gaskill (<A HREF="mailto:braddock@braddock.com">braddock@braddock.com</A>) on 24 September 1999. It is a list, with links and descriptions, of available Open Source electronic printed circuit board design software.<P>
This was compiled for the Open PowerPC Project. The Open PowerPC project (<A HREF="http://www.openppc.org">http://www.openppc.org</A>) is an effort to make an "Open Source" PPC CPU-based motherboard design. But first we need Open Source tools to do it with! Please contribute or correct me any way you can (Braddock Gaskill - <A HREF="mailto:braddock@braddock.com">braddock@braddock.com</A>). Thanks.<P>
<A NAME="toc"><H1>Table of Contents</H1>
<UL>
<LI><A HREF="#PCB">PCB</A>
<LI><A HREF="#GEDA">gEDA - GPL Electronic Design Automation</A>
<LI><A HREF="#chipmunk">Caltech "Chipmunk" tool collection</A>
<LI><A HREF="#MUCS">MUCS PCB - University of Manchester PCB Software</A>
<LI><A HREF="#xcircuit">XCircuit</A>
<LI><A HREF="#electric">Electric VLSI Design System</A>
<LI><A HREF="#hpgl2ps">hpgl2ps</A>
<LI><A HREF="#edif">Edif Parser</A>
<LI><A HREF="#PCBCA">PCBCA</A>
<LI><A HREF="#links">Related Links</A>
</UL>
<HR><A NAME="PCB"><H2>PCB</H2>
Graphical PCB Layout Application<BR>
<B><EM>Description:</EM></B> "PCB" program seems stable and flexable. Needs support for more layers and groups. Outputs Gerber, NC drill file, and Postscript. Saves/Loads in a well documented format. Large existing parts library.
Well documented.<BR>
<B><EM>Part Library:</EM></B> Yes<BR>
<B><EM>Primary authors:</EM></B> Thomas Nau (<A HREF="mailto:Thomas.Nau@rz.uni-ulm.de">Thomas.Nau@rz.uni-ulm.de</A>), Harry Eaton (<A HREF="mailto:haceaton@aplcomm.jhuapl.edu">haceaton@aplcomm.jhuapl.edu</A>)<BR>
<B><EM>Web Page:</EM></B> <A HREF="http://bach.ece.jhu.edu/~haceaton/pcb/">http://bach.ece.jhu.edu/~haceaton/pcb/</A><BR>
<B><EM>Mailing list:</EM></B> <A HREF="mailto:pcb@majordomo.uni-ulm.de">pcb@majordomo.uni-ulm.de</A><BR>
<HR><A NAME="GEDA"><H2>gEDA - GPL Electronic Design Automation</H2>
<B><EM>Web Page:</EM></B> <A HREF="http://www.geda.seul.org">http://www.geda.seul.org</A><BR>
<B><EM>Mailing List:</EM></B> <A HREF="mailto:geda-dev@geda.seul.org">geda-dev@geda.seul.org</A><BR>
<B><EM>Description:</EM></B> This is a very ambitious project to create a sophisticated integrated electronic CAD application suite. <EM>[Most of the tools, however, are in very early stages of development and may or may not be ready for production use.]</EM> The suite uses the GTK GUI toolkit (like GIMP and GNOME).<BR>
<UL>
<LI><EM><B>ACS</B></EM> - Al's Circuit Simulator (Author: Al Davis - <A HREF="mailto:aldavis@ieee.org">aldavis@ieee.org</A>)<BR>
ACS is a general purpose circuit simulator. It performs nonlinear dc and transient analyses, fourier analysis, and ac analysis linearized at an operating point. It is fully interactive and command driven. It can also be run in batch mode or as a server. The output is produced as it simulates. Spice compatible models for the MOSFET (level 1,2,3,6) and diode are included in this release.<BR>
<LI><EM><B>gmos</B></EM> - Metal/Oxyde Semiconductor simulator (Author: Emmanuel Rouat - <A HREF="mailto:emmanuel.ruat@wanadoo.fr">emmanuel.ruat@wanadoo.fr</A>)<BR>
<LI><EM><B>gnetlist</B></EM> - Netlist Generation (Author: Ales V. Hvezda - <A HREF="mailto:ahvezda@gega.seul.org">ahvezda@gega.seul.org</A>)<BR>
gnetlist is a netlist generation program. It takes .sch (schematic) and .sym (symbol) files and converts them into netlists. Well, at least that's the plan-- gnetlist is still highly alpha and isn't usable yet, but it is being worked on.<BR>
<LI><EM><B>gpcb</B></EM> - Printed Circuit Board (Author: Eric Busta - <A HREF="mailto:ewbusta@geda.seul.org">ewbusta@geda.seul.org</A>) - Possibly vaporware?<BR>
<LI><EM><B>gschcheck</B></EM> - Schematic Checker (Author: Jamil Khatib <A HREF="mailto:khatib@ieee.org">khatib@ieee.org</A>)<BR>
gschcheck is a schematic sheet checker. Give it a schematic file and it will go through and perform some basic ERC (Electronic Rule Checking) such as floating nets, floating pins, and multiple net names. "It is a fairly new piece of code but it works."<BR>
<LI><EM><B>gschem</B></EM> - Schematic Capture (Author: Ales V. Hvezda - <A HREF="mailto:ahvezda@geda.seul.org">ahvezda@geda.seul.org</A>)<BR>
gschem is the schematic capture program/tool which is part of gEDA. It's sole purpose is to facilitate the graphical input of components/circuits. <EM>[Looks like it will be a nice tool, but not very feature rich yet.]</EM><BR>
<LI><EM><B>sarlacc</B></EM> - An OrCAD schematic converter (Author: Matthew Ettus - <A HREF="mailto:matt@ettus.com">matt@ettus.com</A>)<BR>
Project Sarlacc is an OrCAD to gEDA format schematic converter. This project is beta software, so it still has limitations. <EM>[This may prove VERY useful in converting the IBM PPC POP or Motorola reference designs]</EM><BR>
<LI><EM><B>Icarus Verilog</B></EM> - Verilog Compiler (Author: Stephen Williams - <A HREF="mailto:steve@icarus.com">steve@icarus.com</A>)<BR>
Icarus Verilog is a a GPLed Verilog compiler. Icarus Verilog includes a a parser that parses Verilog (plus extensions) and generates an internal netlist. The netlist is passed to various processing steps that transform the design to more optimal/practical forms, then passed to a code generator for final output.<BR>
Official website of Icarus Verilog is: <A HREF="http://www.icarus.com/eda/verilog/">http://www.icarus.com/eda/verilog/</A><BR>
</UL>
<HR><A NAME="chipmunk"><H2>Caltech "Chipmunk" tool collection</H2>
These tools date back to the early 80's.<BR>
<B><EM>Web Site:</EM></B> <A HREF="http://www.pcmp.caltech.edu/chipmunk/">http://www.pcmp.caltech.edu/chipmunk/</A><BR>
<B><EM>Contact:</EM></B> John Lazzaro (<A HREF="mailto:lazzaro@cs.berkeley.edu">lazzaro@cs.berkeley.edu</A>)<BR>
<B><EM>Description:</EM></B><BR>
<B>"Log"</B> - Log is a circuit schematic capture tool and simulation
environment. Log supports schematic entry for documentation, simulation,
and netlist creation. Schematic printouts can be previewed on-screen, and
Postscript and HPGL output. Can generate SPICE and "NTK" format netlists.
Has extensive (?) analog and digital simulation capabilities.<BR>
<B>"Wol"</B> - IC mask layout environment.IS THIS ADAPTABLE TO PCB LAYOUT?<BR>
Numerous other supporting tools.<BR>
<HR><A NAME="MUCS"><H2>MUCS PCB - University of Manchester PCB Software</H2>
A suite of PCB layout tools, from schematic capture, to auto-routing, to layout.<BR>
<B><EM>Authors:</EM></B> Doug Edwards, Alistair MacIntosh, Zahir Moosa, Fred Hoyle<BR>
<B><EM>Web Page:</EM></B> <A HREF="http://www.cs.man.ac.uk/amulet/pcb/index.html">http://www.cs.man.ac.uk/amulet/pcb/index.html</A><BR>
<B><EM>Description:</EM></B> The main feature of this tool-set is it's stand-alone <B>auto-router</B>, which seems quite advanced and implements several algorithms. Documentation seems very good. File formats are well documented. This router is just asking to be integrated into PCB or gEDA...<BR>
Other MUCS tools include: <EM>Ncap</EM>, a textual schematic capture interface; <EM>Place</EM>, a graphical device placement tool; and various other utilities for manipulating and editing the design and generating GERBER or HPGL output.<BR>
<B><EM>Part Library:</EM></B> Yes<BR>
<HR><A NAME="xcircuit"><H2>XCircuit</H2>
Schematic Capture drawing tool.<BR>
<B><EM>Description:</EM></B> Very appropriate for parts-library based drawing,
but of unknown maturity (?). Can save "netlist" format files for
layout or simulation tools.<BR>
<B><EM>Part Library:</EM></B> Yes<BR>
<B><EM>Author:</EM></B> R. Timothy Edwards - <A HREF="mailto:tim@bach.ece.jhu.edu">tim@bach.ece.jhu.edu</A><BR>
<B><EM>Web Page:</EM></B> <A HREF="http://bach.ece.jhu.edu/~tim/programs/xcircuit">http://bach.ece.jhu.edu/~tim/programs/xcircuit</A>
<HR><A NAME="electric"><H2>Electric VLSI Design System</H2>
<EM><B>Web Page:</B></EM> <A HREF="http://www.electriceditor.com">http://www.electriceditor.com</A><BR>
<EM><B>Description:</B></EM> This is a very extensive CAD system. It used to be commercial until "Electric Editor, Inc" released it under GPL for pubicity to sell their commercial modules for it. Electric can handle many forms of circuit design, including:
<UL>
<LI>Custom IC layout
<LI>Schematic Capture (digital and analog)
<LI>Textual Languages such as VHDL and Verilog
<LI>Electro-mechanical hybrid layout
<LI>Programmable logic (FPGAs)
</UL>
The free version of Electric supports a number of file formats, but EDIF and SDF require a commercial module from Electric Editor, Inc (though you're free to write a GPL'd one!) Electric includes a fairly extensive manual.<BR>
<EM><B>Contact:</B></EM> Steven Rubin (<A HREF="mailto:stubin@electriceditor.com">stubin@electriceditor.com</A>)<BR>
<HR><A NAME="hpgl2ps"><H2>hpgl2ps</H2>
<EM><B>Description:</B></EM> This is a very small C program to convert HPGL or DXY files to PostScript. This is from comp.sources.misc, Volume 1, 1987. <EM>[I have not been able to get this to actually work, even on the supplied test case.]</EM>.<BR>
<EM><B>Download:</B></EM> <A HREF="ftp://ftp.uu.net/usenet/comp.sources.misc/volume1/8712/hpgl2ps.Z">ftp://ftp.uu.net/usenet/comp.sources.misc/volume1/8712/hpgl2ps.Z</A> <BR>
<EM><B>Author:</B></EM> Don McCormick (<A HREF="mailto:damc@natmlab.dms.oz.au">damc@natmlab.dms.oz.au</A> ???)<BR>
<HR><A NAME="edif"><H2>Edif Parser</H2>
<EM><B>Description:</B></EM> This is a BISON parser for EDIF 2.0.0 level 0, which is a standard CAD format (see <A HREF="http://www.edif.org">http://www.edif.org</A> , though they want a couple hundred to buy the spec <EM>[Anyone know where else we can get the spec??]</EM>). This would require a lot of work to make useable.<BR>
<EM><B>Download:</B></EM> <A HREF="ftp://ftp.uu.net/usenet/comp.sources.misc/volume1/8712/edif">ftp://ftp.uu.net/usenet/comp.sources.misc/volume1/8712/edif</A> <BR>
<EM><B>Author:</B></EM> Roger March (<A HREF="mailto:roger@mips.com">roger@mips.com</A> ???)<BR>
<HR><A NAME="PCBCA"><H2>PCBCA</H2>
<EM><B>Description:</B></EM> An old ('89) DOS PCB autorouting package. It may be useful, however, because it comes with C source (6000+ lines), and an article describing the algorithms used, and routing algorithms in general, with references. Licensing is GPLish.<BR>
<EM><B>Download:</B></EM> <A HREF="ftp://oak.oakland.edu/pub/simtelnet/msdos/cad/pcbca110.zip">ftp://oak.oakland.edu/pub/simtelnet/msdos/cad/pcbca110.zip</A> <BR>
<EM><B>Author:</B></EM> Randy Nevin<BR>
<HR><A NAME="links"><H1>Related Links</H1>
<DL><p>
<DT><A HREF="http://www.ping.be/~ping0751/thepcb.htm" ADD_DATE="936894105" LAST_VISIT="936894079" LAST_MODIFIED="936894079">The PCB FAQ</A>
<DT><A HREF="http://www.ping.be/electrozone/" ADD_DATE="936895089" LAST_VISIT="936895072" LAST_MODIFIED="936895072">The Electrozone</A>
<DT><A HREF="http://www.hut.fi/Misc/Electronics/" ADD_DATE="936895793" LAST_VISIT="936938648" LAST_MODIFIED="936895782">Electronics info page</A>
<DT><A HREF="http://www.thinktink.com/" ADD_DATE="936896166" LAST_VISIT="936896341" LAST_MODIFIED="936896153">Green CirKit Instrument Prototyping Homepage</A>
<DT><A HREF="http://www.hut.fi/Misc/Electronics/software.html" ADD_DATE="936896645" LAST_VISIT="938186733" LAST_MODIFIED="936896516">Electronics software</A>
<DT><A HREF="http://www.ece.ucdavis.edu/sscrl/clcfaq/faq/faq-toc.html" ADD_DATE="936896917" LAST_VISIT="936897217" LAST_MODIFIED="936896828">EE CAD FAQ (comp.lsi.cad,comp.lsi)</A>
<DT><A HREF="http://bach.ece.jhu.edu/~tim/programs/xcircuit/" ADD_DATE="936897441" LAST_VISIT="938114093" LAST_MODIFIED="936897297">XCircuit drawing program home page</A>
<DT><A HREF="http://www.pcmp.caltech.edu:80/chipmunk/" ADD_DATE="936898597" LAST_VISIT="938115053" LAST_MODIFIED="936898590">The Chipmunk Home Page</A>
<DT><A HREF="http://www.mot.com/SPS/PowerPC/teksupport/refdesigns/" ADD_DATE="936899378" LAST_VISIT="936899364" LAST_MODIFIED="936899364">PowerPC Reference Designs and Evaluation Boards</A>
<DT><A HREF="http://www.eng.uci.edu/~rshah/pcb-faq" ADD_DATE="936906579" LAST_VISIT="936906547" LAST_MODIFIED="936906547">http://www.eng.uci.edu/~rshah/pcb-faq</A>
<DT><A HREF="http://www.allied.avnet.com/" ADD_DATE="936907820" LAST_VISIT="936907922" LAST_MODIFIED="936907797">Allied Electronics - Specializing in Electronic Components and Equipment Distribution.</A>
<DT><A HREF="http://www.rdrop.com/~cary/html/schematic.html" ADD_DATE="936920247" LAST_VISIT="936920758" LAST_MODIFIED="936920227">schematic interchange</A>
<DT><A HREF="http://www.rdrop.com/~cary/html/schematic.html" ADD_DATE="936920530" LAST_VISIT="936920758" LAST_MODIFIED="936920432">schematic interchange</A>
<DT><A HREF="http://www.edif.org/introduction.html" ADD_DATE="936921637" LAST_VISIT="936921622" LAST_MODIFIED="936921622">Introduction</A>
<DT><A HREF="http://www.repairfaq.org/" ADD_DATE="936923157" LAST_VISIT="936923138" LAST_MODIFIED="936923138">Sci.Electronics.Repair FAQ: Home Page</A>
<DT><A HREF="http://www.geda.seul.org/" ADD_DATE="938116481" LAST_VISIT="938193635" LAST_MODIFIED="938116453">Homepage of gEDA</A>
<DT><A HREF="http://bach.ece.jhu.edu/~haceaton/pcb/" ADD_DATE="938118841" LAST_VISIT="938118693" LAST_MODIFIED="938118693">PCB Home Page</A>
<DT><A HREF="http://www.geda.seul.org/links.html" ADD_DATE="938119285" LAST_VISIT="938214946" LAST_MODIFIED="938119127">Links to other free EDA software</A>
<DT><A HREF="http://www.ettus.com/sarlacc/" ADD_DATE="938126359" LAST_VISIT="938189534" LAST_MODIFIED="938126330">Project Sarlacc</A>
<DT><A HREF="http://www.enteract.com/~adyer/eemisc.html" ADD_DATE="938127187" LAST_VISIT="938127598" LAST_MODIFIED="938127178">EE software</A>
<DT><A HREF="http://www.eg3.com/" ADD_DATE="938127273" LAST_VISIT="938127345" LAST_MODIFIED="938127235">eg3.com:overviews dsp, embedded, applied computing, system-on-a-chip, and more!</A>
<DT><A HREF="http://www.electriceditor.com/" ADD_DATE="938127582" LAST_VISIT="938196262" LAST_MODIFIED="938127550">Electric Editor, Incorporated</A> </DL><p>
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