Re: gEDA: how to connect power?

[Magnus Danielson <cfmd-at-NOSPAMswipnet_dot_se>]

From: Ales Hvezda <ahvezda@seul.org>
Subject: Re: gEDA: how to connect power?
Date: Tue, 11 Apr 2000 20:46:27 -0400

> 
> [ Ales here, I'm reposting this since majordomo didn't recognize the
>   e-mail as being subscribed to the geda-dev mailinglist. ]
> 
> -- Cut here --
> 
> Rolf Fiedler wrote:
> 
> > Roger Williams wrote:
> > >
> > > >>>>> mcmahill  <mcmahill@mtl.mit.edu> writes:
> > >
> > >   >> I do have a problem connecting power pins of 74xx symbols. Since
> > >   >> they are not drawn in the symbol...
> > >
> > >   > personally, I believe that implicit power/ground connections are
> > >   > _EVIL_... I want to know from a glance at the schematic which
> > >   > ground the digital parts go to and which supply they go to.
> 
> This only makes sense for mixed analog-digital designs; for the overwhelming
> majority of digital IC applications, the power/ground pins don't need to
> appear on the circuit diagram.

This used to be the truth, to some degree. However, as higher speed "all
digital"designs is becoming more common it becomes more and more important to
deal with the actual analog properties. Exactly the same is happening in the
ASIC world.

I think one really have to consider the design flow. When you are spreading out
a number of instances of gates, logic block or whatever. Bypass capacitors may
not be the first things that springs to mind, even if some people think maybe
they should add it, it will become a obstruction of their core thinking at the
moment.

No, one would really like to do this in a later passage over the design. The
trouble is also that PCB layout, stack buildup etc comes in and add up to the
calculation. The requirements may be diffrent for diffrent chips and really
relates to the characteristics of a chip in that familly. Hmm, to some degree
this lends itself to automation. Thus, given that we have done a design of the
core curcuit we could have the bypass capacitors inserted by a tool using hints
in the power part of the component. Thus, these things would come in at a later
time in the design process.

There are many other forms of design developments that really should be made in
a similar way, like various forms of passive level/impedance adaptions etc.

Thus, these things are part of the design, but are added at a later time in the
design as part of a succsessive refinement of the design as being part of a
design flow. Not all of these things should necessarilly have to be done by
automatic means, but a lot of design flaws that I see is due to the inpropper
way it is being carried out in real designs and the cost of fixing them migth
be high, especially if you have to do another round of the card.

In the real life electronic designs that I see explicit power/ground of some
form is badly needed even for "all digital" designs. Implicit power/ground is
a usefull concept during part of the design phase, but eventually it has to be
resolved into an explicit form.

In the end, you really want to know which caps belongs to which chip and how
they are supposed to be connected. The later is interesting since multiple
power pins is nowdays common and the cap requirement may differ.

I have even seen when both powerfeeds where individually treated with a
Pi-filter (cap, inductor, cap) in order to have a nice and clean power.
All digital - Bah!

With issues like EMC and signal integrity being more critical as designs
strives towards higher complexity and higher frequencies I think one better
prepare oneself.

So, with this reasoning I have the humble opinion that explicit power/ground
connections should be available on all chips in one or another form.

Cheers,
Magnus