Re: gEDA: Problem with parametrized constant widths in VBS

[Steve Wilson <stevew-at-NOSPAMhome_dot_com>]

Just for the heck of it, I pushed the same code thru Icarus Verilog and
Veriwell.  Both said that the IDLE=ws'h0 gave them heartburn.

Steve

Jimen Ching wrote:

> On Mon, 17 Apr 2000, Stephen Williams wrote:
> >ahvezda@seul.org said:
> >> With such definitions, the "state_reg = ADR;" statement results in
> >> setting state_reg to 3
> >   parameter        ws=3;
> >   reg [ws-1:0]     state_reg;
> >   parameter        IDLE = ws'h0, ADR = ws'h7, RD1 = ws'h6, RD2 = ws'h3,
> >                    WR1 = ws'h4, WR2 = ws'h5 ;
> >Just to clarify, you are saying that the subsequent statement
> >       state_reg = ADR;
> >       $display("state_reg = %b", state_reg);
> >
> >causes the output "state_reg = 011"? What happens if you replace "ADR = ws'h7"
> >with "ADR = 3'h7"?
>
> I get 7.  My question is, can a parameter be used as part of the symbols
> that make up the decimal_number terminal (YACC speak)?  According to the
> IEEE-1364, I am supposed to look for a 'unsigned_number' where 'ws' was
> used.  A parameter_identifier is considered a 'constant_primary' terminal.
> Thus, it is not a valid construct for a decimal_number.
>
> I think VBS is doing the right thing, and the code above is wrong.  Anyone
> have opinions?
>
> --jc
> --
> Jimen Ching (WH6BRR)      jching@flex.com     wh6brr@uhm.ampr.org

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stevew@home.com         KA6S