Re: gEDA: Bartels Autoengineer Netlister

[Andrew Bardsley <bardslea-at-NOSPAMcs_dot_man_dot_ac_dot_uk>]

On Thu, 20 Apr 2000, Rolf Fiedler wrote:

> Hi,
> 
> I just did an Bartels Autoengineer Netlister. You find it attached.
> And there is one for the Protel2 netlist format, as used in the
> current protel pcb versions. 

Code ;)

I haven't looked at any of the scheme in gEDA for a while, so
I'm not sure what's current practice, but I noticed that this
netlist generate has lots of those bare (newline)s and (display)s
you get when writing compliant scheme.  May I suggest a
couple of procedures to make this easier (added to some common gEDA code
base):

(define (print-to-port port . l)
    (for-each (lambda (elem) (display elem port)) l))

(define (print . l)
    (apply print-to-port (cons (current-output-port) l)))

e.g. (print-to-port netlist-file "Lots" "of" "strings" "and" "other"
	#f 10 20 '#(1 2 3) "things")

I usually define similar procedures which track levels of indentation
too.

- Andrew
    _______________
___/Andrew Bardsley\____________________________________________
University of Manchester Dept. of Computer Science  AMULET Group
Research Assistant bardsleyATcs.man.ac.uk  Tel: +44 161 275 6844
Snail: Room IT302, Man. Uni., Oxford Rd, Manchester, M13 9PL, UK

gnet-protelII.scm

gnet-bae.scm