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Re: gEDA: Bartels Autoengineer Netlister



Hi,

[snip]
>> I just did an Bartels Autoengineer Netlister. You find it attached.
>> And there is one for the Protel2 netlist format, as used in the
>> current protel pcb versions. 
>
>Code ;)


	Yes indeed. :-)


>I haven't looked at any of the scheme in gEDA for a while, so
>I'm not sure what's current practice, but I noticed that this
>netlist generate has lots of those bare (newline)s and (display)s
>you get when writing compliant scheme.  May I suggest a
>couple of procedures to make this easier (added to some common gEDA code
>base):
>
>(define (print-to-port port . l)
>    (for-each (lambda (elem) (display elem port)) l))
>
>(define (print . l)
>    (apply print-to-port (cons (current-output-port) l)))
>
>e.g. (print-to-port netlist-file "Lots" "of" "strings" "and" "other"
>	#f 10 20 '#(1 2 3) "things")


	Hmmm.. I have no objections, I've added into gnetlist.scm for
netlist authors to use.  Yoink!  Thanks.

								-Ales