Re: gEDA: User problems: Use of geda VERILOG tools to compile Lattice FPGA's?

[Stephen Williams <steve-at-NOSPAMicarus_dot_com>]

wzab@ise.pw.edu.pl said:
> Maybe the possibility to output the generated netlist in the ASCII
> format would let us - the users, to create the "batch converters" for
> different EPLD tools provided by IC manufacturers?

So someone could write a backend that writes some simplified format
that you perl programmers can manipulate. It's possible, if someone
would define what that simplified format should be. Once you've done
that, though, you've created yet another netlist format that is probably
no simpler then existing netlist formats.
-- 
Steve Williams                "The woods are lovely, dark and deep.
steve@icarus.com              But I have promises to keep,
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http://www.picturel.com       And lines to code before I sleep."