gEDA: synbol, schematic format, schematic generator

[Stefan Thiede <Stefan_dot_Thiede-at-NOSPAMsv_dot_sc_dot_philips_dot_com>]

a) symbols

Is there any reason not to use edif for the symbols ?

Very easy to parse (lex or lex/yacc) and contains everything
needed for symbols. End everybody using cadence/synopsys has alreay
all the needed symbols or can export them.

b) schematics

Same with saving schematics. Edif is well capable of describing
schematics.

c) schematic generator

I'm still looking for a schematic generator (netlist -> schematic)
Any code/pointers/papers/ideas/contact persons ?

Stefan
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Stefan Thiede              Tel:   +1 (650) 335-2544
Windows Systems Group      Fax:   +1 (650) 335-2514
Philips Semiconductors    
811 E. Arques Avenue
M/S 42, P.O. Box 340       email: Stefan.Thiede@sv.sc.philips.com
Sunnyvale, CA 940488-3409  seri :        thiede@usmtvsc1