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Re: gEDA: vhdl simulator
From: mcmahill@mtl.mit.edu
Subject: gEDA: vhdl simulator
Date: Sun, 26 Nov 2000 04:10:15 -0500 (EST)
>
>
> can anyone recommend a freely available VHDL simulator? Someone has been
> asking me and he needs VHDL (for school) rather than verilog.
Well, I know of three VHDL simulators:
1) Electric
Released under GPL and is found from FSF (http://www.fsf.org).
It's a graphical environment type of tool, it can also do
synthesis. It has limited VHDL simulation support (structual VHDL)
but may be usefull. I haven't checked the latest versions thought.
2) Savant
Released under GPL or LGPL, I don't recall.
It is trying to grasp the full VHDL, but you are "blind" in that
there is simply no such thing as waveform dumping. I have as a
longterm goal to contribute on that so that it can be
usefull. However, things like being able to handle IEEE libs got in
the way and has delayed much of the waveform dumping work. However,
I've learned some on the internal stuff so maybe, maybe.
3) FreeHDL
Released under GPL (http://www.freehdl.seul.org/)
I haven't seen much movement in this. It seems like an atempt to be
an Savant (which used to not be really that free) but looking more
on practical things like waveform dumping. It got somewhere but
then I didn't see any movements. I'd love to see that they make progress.
Please look at http://www.opencollector.org/summary.php3
to find some more leads.
The only possibly interesting thing that I find there is the PICA.
Now, if you are looking for something like ModelSim, the free tools
are not really there yeat. IMHO is Savant the framework which migth be
best to work on (which is why I try to do that, when I have time) in
order to acheive real VHDL simulation capabilities for free. We don't
have the graphical frontend in Savant, the main work really lies in
the way the hole simulation and VHDL compliance stuff work. Savant
also suffers from a number of defiencies IMHO, but eventually some
of that may be washed out.
Cheers,
Magnus