Re: gEDA: Xilinx parts

[Stephen Williams <steve-at-NOSPAMicarus_dot_com>]

 - First you convert your back-of-the-envelope schematics to verilog
 - Then you simulate and view the results of different stimuli
 - When it all seems to work, generate file foo
 - Finally, run file foo through the vendor-specific tools ($$ I
   guess) to generate whatever is dumped onto the FPGA PROM

Correct, basically.


borges@ifi.uio.no said:
> I'm kind of complaining about the lack of Xilinx tools. A 20K gates
> limit for the student edition is pathetic!

At least you can get something. I can't get xilinx tools at any price,
especially not for my alpha. If there are any FPGA vendors that do support
Linux, I might want to do back-ends for them.
-- 
Steve Williams                "The woods are lovely, dark and deep.
steve@icarus.com              But I have promises to keep,
steve@picturel.com            and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."