gEDA: Icarus Verilog Snapshot 20020602

[Stephen Williams <steve-at-NOSPAMicarus_dot_com>]

Bunches more improvements in Icarus Verilog, killed a few bugs and
added yet more language coverage. I've been using Icarus Verilog in
my day job work, so I have stumbled on some interesting glitches,
that I've dealt with.

   <ftp://icarus.com/pub/eda/verilog/snapshots/verilog-20020526.tar.gz>
   <ftp://icarus.com/pub/eda/verilog/snapshots/verilog-20020526.txt>


Release Notes for Icarus Verilog 20020602

The library support in Icarus Verilog has been improved. It now
invokes the preprocessor on library modules that are read in. There
are also new commands supported in the command file to do case
insensitive module lookups. This is useful when UNIX/Linux users are
faced with design files and libraries from Windows users.

Icarus Verilog also now defines the __ICARUS__ macro. You can use
ifdef/ifndef to conditionally compile in/out Icarus Verilog specific
stuff.

I've added support for the $timeformat system task. The %t format in
$display and the like should now work properly compared to commercial
tools.

The vvp simulation and matching code generator have ben improved, with
new instructions and a better code generator to take advantage of
them. Simulations should run a little faster now.

Various odd bugs have been fixed.

More tf_ and acc_ functions are implemented in the veriuser
library. It looks like the trick of implementing tf_ and acc_
functions using VPI will work.

-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
steve at picturel.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."

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