Re: gEDA-dev: Re: Icarus Verilog and Xilinx unisim files

[Uwe Bonnes <bon-at-NOSPAMelektron_dot_ikp_dot_physik_dot_tu-darmstadt_dot_de>]

>>>>> "Stephen" == Stephen Williams <steve@icarus.com> writes:


    Stephen> If you're building from source, one easy thing you can do is
    Stephen> see the assert in eval_expr.c line 1660 and replace it with an
    Stephen> ivl_assert that will give a Verilog file/line number as
    Stephen> well. That may help you narrow down the problem. But if you
    Stephen> can't, that's OK to. Just make sure I have the version
    Stephen> information I need.

It's not that easy.

eval_expr.c is inside the tgt-vvp directory and  compiled with gcc, while
ivl_assert uses C++ constructs. 

I have noe ideas, what arguments ivl_asserts() expects in the context of
eval_expr.c

-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------


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