Re: gEDA-dev: SoC: Gerber, DRC, gsch2pcb and D-BUS

[al davis <ad136-at-NOSPAMfreeelectron_dot_net>]

On Friday 23 March 2007 09:27, Mike Jarabek wrote:
> Because you mention the Verilog netlister, my interest has
> been peaked.  What is missing from the netlist that makes it
> unusable?  I know for a fact that it has been used in several
> designs to construct synthesizable netlists that implement
> designs. (One of my own, and one that had something like 30
> pages of schematics that were hierarchichal, which was done
> by another team.)

It is an analog design.  The attributes are not passed.

I need:
  resistor #(.r(1k)) R2 (foo, bar);

The ground node is not identified.  It should be of 
type "ground" not "wire".

> If you mean that the descriptions for the implementations for
> say, TTL gates are missing, then I will point out that the
> netlister is capable of generating the appropriate verilog
> structural gate descriptions. 

No.  I don't expect the netlister to provide anything that is 
not in the schematic.

> I certainly agree that the Verilog output is not 'lossless'
> in the sense that you can't re-generate the schematic from
> the netlist.  The truth is, the output of the netlister is
> just that, a netlist.  In this case, it's only an interchange
> format for the interconnect, nothing more.

It can be lossless.  One list of objects to another...

That is part of the reason for multiple architectures.  One 
represents a lossless representation of the schematic, complete 
with every line segment as objects.  Another would be a lossy 
derivative of that, that a digital gate simulator can use.

The other issue, not yours, is that I need to be able to 
generate something that can be simulated from a layout.
We have a simulator that can do signal integrity analysis.  The 
only thing that is missing the ability to move the layout data 
to a format the simulator can read.

My issue is not with any of the indivdual translators, but 
rather with the concept.  We need a lossless,easy, portable, 
standard way to share between tools, including the ones we 
don't have yet.


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