Re: gEDA-dev: New diagram (attempt at UML)

[John Doty <jpd-at-NOSPAMwispertel_dot_net>]

On Apr 10, 2007, at 2:23 PM, Steve Meier wrote:

> I don't follow you here.
>
> I understand that you want to keep the hierarchy. So do I.  
> Following the
> source= attribute just tells me which schematics are needed.
>
>
> Pass 1) Create list of unique files. This is the first time I  
> follow the
> branches of the hierarchical tree
>
>
> Pass 2) Collect components, nets and buses for each unique file

What do you do with a file of simulation circuitry if the netlist is  
for a PCB? The components here don't have footprints: typically they  
are inside something that has a footprint.

>
> This creates netlists and buslists for each schematic page.
>
>
> Pass 3) Flatten pages to make a super page that has all instances of
> all components, nets and buses.

Yes, but in a SPICE netlist I generally don't want that. That's why I  
can't use source= when I'm doing IC design, even though it would be  
handy to do "Down Schematic" in gschem.

> This is the second time I follow the
> branches of the hierarchical tree. Hierarchical Information is  
> retained.
> net names are hierarchicaly adjusted. Buses are converted to nets.
>
> When I flaten the net I still retain the hierarchy information.  
> Also, I
> use the step 2 nets and buses repeatedly adjusting the hierarchy as  
> they
> are added to the overall design
>
>
> Warning: My version is not the standard geda distribution.
>

John Doty              Noqsi Aerospace, Ltd.
jpd@noqsi.com




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