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Re: gEDA-dev: New diagram (attempt at UML)




On Apr 10, 2007, at 7:37 PM, al davis wrote:

> On Tuesday 10 April 2007 20:59, John Doty wrote:
>> In any case, can't these new formats handle hierarchy? I
>> would think   it preferable to let the simulator do the
>> expansion, not the netlister. Am I missing something?
>
> Of course they can.  The question at the top was
>>>> Is these
>>>> a netlist format that you would recommend that is
>>>> hierarchical?
>
> On Tuesday 10 April 2007 20:59, John Doty wrote:
>> When my customers want that, I'll go that way. I might look
>> into it,   and nudge them a little. You have me interested.
>> But on my last (and first) IC design, the deliverable in the
>> contract was a SPICE netlist.
>
> We need to design for the future.  We have a Spice netlister
> that works as well as can be expected for a Spice netlister.
> The Verilog netlister does not support attributes, or any of
> the analog extensions.
>
> What Spice do they want?  HSpice?  PSpice? NG-spice?

We used HSpice for interchange. I used a modified spicepp.pl to  
convert to ngspice for my simulations. Not without bumps, but it got  
the job done without too much wasted time or money. A part-timer like  
me can't afford expensive commercial tools. I was spending more time  
doing spacecraft operations and gamma ray astronomy than IC design.

>
> I don't know what the priorities of the other developers are,
> but for me the people doing free/open-source hardware
> development are the top priority. We are the enabler for that,
> in the same sense that gcc was the enabler for the whole
> free/open-source software movement.  Another priority for me is
> a base for researchers, so they can build on free tools rather
> than proprietary ones.

Well, I am a researcher. One of my collaborators is the publisher of  
OpenIP (http://research.kek.jp/people/ikeda/). But those netlists are  
all SPICE.

>
> If there is are commercial users, that's fine, but not the
> highest priority.  If some of them want to send some money this
> way, they could move to the top.

Even researchers need to make money. I provide services to  
universities doing sponsored research. I've also done work for NASA.

>
> The highest interest in gnucap is absolutely in the promise of a
> fast, free (GPL) Verilog-AMS simulator.  They would like other
> tools (schematic, layout, timing analysis, ...) that work with
> it too.

I have no axe to grind here, but I've little clue as to what Verilog- 
AMS is and what it can do. Since vendors provide SPICE models, it's  
hard to understand how I could actually use it.

>
> The interest I have gotten from the gEDA community is small by
> comparison.
>
>
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John Doty              Noqsi Aerospace, Ltd.
jpd@noqsi.com




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