Re: gEDA-dev: New diagram (attempt at UML)

[Dan McMahill <dan-at-NOSPAMmcmahill_dot_net>]

John Doty wrote:

>>> I have no axe to grind here, but I've little clue as to what
>>> Verilog- AMS is and what it can do. Since vendors provide
>>> SPICE models, it's hard to understand how I could actually
>>> use it.
>>
>>
>> Actually now a lot of them are done first in Verilog-AMS,
>> because it is easier.  Then they make a Spice model for
>> everyone else.
> 
> 
> Where are they published in Verilog-AMS, then? Googling finds much  
> Verilog-AMS sales rhetoric, but no models.

don't confuse "model" meaning a set of equations (like bsim) vs "model" 
meaning a set of parameters (like tox=10n vth0=0.50).    Verilog-AMS is 
becoming the way to develop new models of the first type.  Also it is a 
way to provide higher level models for circuit blocks.


here is an example.  PSP is an alternative (replacement?) for bsim 
models for MOSFETS.  If you want your simulator to handle that model, 
you get pre-compiled code you can load (if your simulator supports it 
and they have compiled for your hardware platform) or verilog-a:

http://pspmodel.asu.edu/code.htm


You can get the mextram bjt model this way too:

http://mextram.sourceforge.net/

also a foundry may provide a verilog-a model for some of its devices 
instead of using some more "standard" device model.


For more "real life" examples of what you can do with verilog-AMS see:

http://www.eda.org/verilog-ams/htmlpages/examples.html

-Dan



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