gEDA-user: Some footprints I tried to create

["C P Tarun" <tcpip-atMUNGEDdhandanought_dot_org>]

I have tried to create some common footprints in PCB, partly just
to learn how this thing works. Since I have some experience with
Eagle, I liked the footprints in their library.

So I saw the footprints for common components in PCB and didn't
like their barebones shapes, and decided to create some of my
own. I kept the following in mind:

1. Some portions of the PCB library have values associated with
    footprints, e.g. "1M" resistors and "100K" resistors, etc. I thought
    this was unnecessary. Or maybe I'm missing some vital point...
    you can tell me about it.

2.  Eagle footprints are drawn using 6mil lines. I thought this was
    too thin, so I drew them using 8mil lines. (My PCB fab chap seems
    to generate really ultra-thin lines  on the silkscreen with 6mil.
    YMMV.) Existing footprints with PCB seem to be drawn with all
    sorts of line thicknesses, including 10mil  and 20mil, which I
    found too thick in some cases.

3.  I tried to make the parts look like "pictures", not "diagrams" or
    symbols. Being a novice circuit designer, I find this important.
    To me, accurate pictorial representation of a component on
    the silkscreen is akin to mnemonic variable names in code. The
    software works just as well with poorly chosen variable names,
    but it's easier to read and understand when the names are
    intelligently chosen.

4.  I did not understand the rationale for the drill dias of the pads
    in some of the parts in the PCB database. I have tried to select
    the drill dia carefully here, based on my limited knowledge of
    the lead diameters.

5.  In my hobby electronics experience, I find that the annular
    copper ring around a drill hole for a pad needs to be at least
    10 mil in width, preferably 15mil, for easy soldering and de-
    soldering. I've tried to retain this in the pins I've done with
    my footprints. YMMV. But with this brilliant decision of PCB
    to keep all file formats as ASCII, it'll be easy for someone
    to write a script to patch the pin annular widths as per your
    preferences if you wish. (I would love to have a script which
    can do with a PCB layout what Eagle does in its DRC: set a
    min width and max width for annular rings, with a percentage
    of drill dia as the guiding rule for in-betweens.)

6.  I did not like the transistor footprints for TO220, TO126, etc,
    which I found with PCB. Some of them did not give me any
    visual indication of which side was the "front" of the device.
    So I drew the shapes accordingly in my footprints, to give a
    clear visual indicator.

7.  I found square pins for Pin 1 of a lot of non-polar passive
    components in the PCB library. I found this unnecessary and
    adding to visual clutter. So I just decided to design my
    footprints with both pins round for such devices.

8.  I wanted elongated pins/pads for some of the higher-current
    devices. So I incorporated them. I don't know whether it'll
    work in reality when I include the device in PCB. I haven't yet
    generated Gerbers and checked.

9.  I created separate sets of footprints for each resistor form
    factor. In the existing PCB library, when you move from a 200mil
    leg spacing to a 300mil spacing, the device also becomes wider.
    This is misleading, and you can't use the silk outline effectively
    to place devices tightly when you are short of space. You need
    accurate body shapes and sizes in the silk outline, IMHO. I tried
    to do this.

I don't know whether these definitions will work. If any of you can
give me feedback, I'll correct my mistakes and put them back up
again. I need these things to be flawless, for my own sake. Check:

    http://www.dhandanought.org/tcpip/audio/EXP/geda-footprints/

Thanks for the help

Tarun


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