Re: gEDA-user: Does anybody know an open source vhdl-ams simulator?

[John Griessen <john-atMUNGEDecosensory_dot_com>]

Svenn Are Bjerkem wrote:

> I had the dream that I could use Signs VHDL environment for Eclipse
> and extend it with VHDL-AMS capabilities to use an open source
> simulator to do real mixed signal. 

The Signs tutorial screen shots and words seem like they have FPGA design in mind,
and it seems like a tidy way to go about it.  I wonder if they have considered the complexity
of "real mixed signal" though?  They have no schematic tool yet...

I think the real first steps toward that wish of a goal is to help get verilog-AMS netlisting to work
with available netlist and schematic tools, (voila gnetlist, gschem), then hooking that into an IDE should be easy for any IDE 
worth it's salt.

John Griessen


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