Re: gEDA-user: icarus for-generate support

["Matt Ettus" <boyscout-atMUNGEDgmail_dot_com>]

Got another one for you.  I am now using the latest git version as of
this morning.  I get the following assertion when trying to compile
the attached files.  They are short, but I put them in a tarball.  The
code shouldn't do anything useful yet, but I believe it is
syntactically correct.  The code has one for-generate in it which is
pretty big, but straightforward.


$ iverilog -y . buffer_pool.v
ivl: vvp_scope.c:1086: draw_net_in_scope: Assertion `word_count == 1' failed.
sh: line 1: 28410 Done                    /usr/local/lib/ivl/ivlpp -L
-F/tmp/ivrlg26a6451cb -f/tmp/ivrlg6a6451cb
     28411 Aborted                 | /usr/local/lib/ivl/ivl
-C/tmp/ivrlh6a6451cb -C/usr/local/lib/ivl/vvp.conf -- -

Thanks,
Matt

On 6/17/07, Stephen Williams <steve@icarus.com> wrote:
>
> Your example below is within the skills of Icarus Verilog, but
> there was a very recent fix for exactly this problem. According to
> my git logs, it was committed 6/11/2007, which is *after* the very
> last snapshot. So try the current git. (It should be in the present
> but stopped CVS as well.)
>
>

generate-assertion.tgz

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